Silicon Labs /Series0 /EZR32HG /EZR32HG320F64R69 /ADC0 /CTRL

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CTRL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (NORMAL)WARMUPMODE 0 (TAILGATE)TAILGATE 0 (BYPASS)LPFMODE 0 (NODIVISION)PRESC0TIMEBASE0 (X2)OVSRSEL0 (CHCONIDLE)CHCONIDLE

OVSRSEL=X2, PRESC=NODIVISION, LPFMODE=BYPASS, WARMUPMODE=NORMAL

Description

Control Register

Fields

WARMUPMODE

Warm-up Mode

0 (NORMAL): ADC is shut down after each conversion

1 (FASTBG): Bandgap references do not need warm up, but have reduced accuracy.

2 (KEEPSCANREFWARM): Reference selected for scan mode is kept warm.

3 (KEEPADCWARM): ADC is kept warmed up and scan reference is kept warm

TAILGATE

Conversion Tailgating

LPFMODE

Low Pass Filter Mode

0 (BYPASS): No filter or decoupling capacitor

1 (DECAP): On chip decoupling capacitor selected

2 (RCFILT): On chip RC filter selected

PRESC

Prescaler Setting

0 (NODIVISION): undefined

TIMEBASE

Time Base

OVSRSEL

Oversample Rate Select

0 (X2): 2 samples for each conversion result

1 (X4): 4 samples for each conversion result

2 (X8): 8 samples for each conversion result

3 (X16): 16 samples for each conversion result

4 (X32): 32 samples for each conversion result

5 (X64): 64 samples for each conversion result

6 (X128): 128 samples for each conversion result

7 (X256): 256 samples for each conversion result

8 (X512): 512 samples for each conversion result

9 (X1024): 1024 samples for each conversion result

10 (X2048): 2048 samples for each conversion result

11 (X4096): 4096 samples for each conversion result

CHCONIDLE

Input channel connected when ADC is IDLE

Links

() ()